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Describes state-of-the art aging- and process variation-aware CAD algorithms.
This book covers the state-of-the-art research in design of modern electronic systems used in safety-critical applications such as medical devices, aircraft flight control, and automotive systems. The authors discuss lifetime reliability of digital systems, as well as an overview of the latest research in the field of reliability-aware design of integrated circuits. They address modeling approaches and techniques for evaluation and improvement of lifetime reliability for nano-scale CMOS digital circuits, as well as design algorithms that are the cornerstone of Computer Aided Design (CAD) of reliable VLSI circuits. In addition to developing lifetime reliability analysis and techniques for clocked storage elements (such as flip-flops), the authors also describe analysis and improvement strategies targeting commercial digital circuits.
In recent decades, integrated circuits have achieved great performance and power improvements owing to aggressive manufacturing technology downscaling. However, smaller feature sizes and higher power densities (and consequently temperature) have made modern VLSI circuits suffer from day-to-day increasing wear and aging effects. Hence, the lifetime reliability of integrated circuits has become a serious and growing challenge for the industry. So, it is necessary to analyze and improve the lifetime reliability of digital circuits such as flip-flops and combinational circuits as the basic components of large-scale integrated circuits.
This book investigates the design techniques for modern electronic systems which are mainly used in applications requiring high reliability and safety such as space satellites, automotive, or healthcare electronic systems. In this book, automated design approaches are presented to analyze and improve the lifetime reliability of electronic systems. The emphasis is on modeling techniques and computer-aided design (CAD) algorithms for the analysis and improvement of lifetime reliability issues in nano-scale CMOS integrated circuits.
Impacts of Process Variations and Aging on Lifetime Reliability of Flip-Flops
Restructuring-Based Lifetime Reliability Improvement of Nanoscale Master-Slave Flip-Flops
Lifetime Reliability Improvement of Pulsed Flip-Flops
Gate Sizing-Based Lifetime Reliability Improvement of Integrated Circuits
Lifetime Reliability Optimization Algorithms of Integrated Circuits Using Dual-Threshold Voltage Assignment