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This book is structured in six chapters, which are complemented by a couple of appendixes. After this Preface, the following one is dedicated to give an insight into the design space of modern wireless systems supported on modern nanoscale digital CMOS technology. As a result of the previous analysis, it becomes clear that the CMOS analog design process faces the need to use alternative circuit and transceiver system design techniques to achieve the low power, area and cost requirements. Within this context, Chap. 2 goes into the foundations of the parametric amplification principle, known since the middle of the twentieth century. This technique is presented as a promising one to be recovered and adapted to CMOS digital technology, by means of a discrete time configuration, which is fully analyzed in Chap. 3. Latest sections of Chap. 3 focus on the use of parametric amplifiers in major digital transceiver buildings blocks, specially inside an ADC. For this last circuit, the design, implementation and testing details of an integrated prototype that is fully based on parametric amplification are described in Chaps. 4 and 5