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The intent of Verilog-AMS is to let designers of analog and mixed-signal systems and circuits create and use models that describe their designs. Once a design is described in Verilog-AMS, simulators are used to help designers better understand and verify their designs. Verilog-AMS allows designs to be described at the same level as does SPICE, but at the same time allows designs to also be described at higher more abstract levels. This range is needed for the larger more complex mixed-signal designs that are becoming commonplace today. This book starts in Chapter 1 with a brief introduction to hardware description languages in general and Verilog-AMS in particular. Chapter 2 presents a formal topdown design methodology. While not used extensively today, top-down design is widely believed to be the only methodology available that can efficiently handle large complex mixed-signal designs. This chapter presents a refined and proven top-down methodology that overcomes many of the problems with existing top-down methodologies. Chapter 3 and Chapter 4 introduce the Verilog-A and Verilog-AMS languages. The important concepts of the languages are presented using practical and easy to understand examples. These chapters are intended to be read from beginning to end and are designed to take engineers with a working knowledge of programming concepts to the point where they are comfortable writing a wide range of Verilog-A and Verilog-AMS models. However, they do not cover all the details of the languages. Chapter 5 is a reference guide to the languages. It presents all of the details, but not in a completely linear fashion. Though it can be read from beginning to end, it was written with the expectation that most would use it as a reference, looking up just the details they need when they need them. As such, it, as with the rest of the book, is extensively cross referenced and indexed