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The parasitic-aware RF circuit synthesis techniques described in this book effectively address this critical problem. In conventional mixed-signal design, parasitic resistances and capacitances are estimated during the design process as they affect design parameters such as bandwidth, phase margin, slew rate, etc. Circuits such as opamps are characterized by one-sided requirements on the parasitics. That is, so long as a parasitic capacitance is below a certain value, for example, the phase margin specification is met or exceed. Because of these one-side requirements, the circuits are usually designed making some initial assumptions about the parasitics and optimized just once manually based on the parasitics extracted from the layout. Traditional mixed-signal design practices simply do not work for RF circuits because of the two-side requirements on their parasitic element values. To tune an RF amplifier to a specific frequency, for example, a nodal capacitance can be neither too large nor too small. That is, it must realize a certain value within a specified tight tolerance. This means that the parasitics associated with all passive elements must be accurately modeled as a function of the element value prior to the synthesis process. For on-chip spiral inductors, for example, the compact model often includes about 10 parasitic components that are complex functions of frequency and inductance value. Moreover, since typical RF circuit blocks may employ tens of passive components, more than 100 passive and parasitic element values must be included in the design process. Obviously, such complexity is unwieldy for typical hand calculations scribbled on the back of a cocktail napkin. Hence, fast and aggressive optimization tools must be readily available to assist the designer in meeting specifications with robustness and cost-effectiveness