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Technological progress in the semiconductor industry has led to a revolution towards new advanced, miniaturized, intelligent, battery-operated and wireless electronic applications. The base of this still ongoing revolution, commonly known as Moore’s law, is the ability to manufacture ever decreasing transistor sizes onto a CMOS chip. In other words, the transistor density increases, leading to larger quantity of transistors which can be integrated onto the same single chip die area. As a consequence, more functionality can be integrated onto a single chip die, leading to Systems-on-Chip (SoC) and reducing the total system cost. Indeed, the cost of electronic applications depends in a inverse-proportional fashion on the degree of on-chip integration, which is the main drive for CMOS scaling. The focus of the presented work is to integrate the switched-mode DC-DC converters onto the SoC, thus reducing both the number of external components and the Printed Circuit Board (PCB) footprint area. However, the poor electrical properties (low Q-factors) of on-chip inductors and capacitors and their low associated values (nH, nF) poses many difficulties, potentially compromising the power conversion efficiency advantage. Combing both the concepts of monolithic SoC integration and achieving a maximal (overall) power conversion efficiency, is the key to success. Moreover, to minimize the costs, the power density of the fully-integrated DC-DC converter is to be maximized.
Introduction
Basic DC-DC Converter Theory
Inductive DC-DC Converter Topologies
A Mathematical Model: Boost and Buck Converter
Control Systems
Implementations
General Conclusions
References