TGx:RavindraBabu Ravula - GATE - 2021 - Digital Logic Design

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RavindraBabu Ravula - GATE - 2021 - Digital Logic Design - CoursesGhar

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File	Size
!! IMPORTANT Note !!.txt	287.00 B
!!! Please Support !!! [CoursesGhar.Com].txt	197.00 B
1.Instruction Note/1.Read Me First.pdf	401.36 kB
2.Logic Functions/1.Basic properties of switching algebra.mkv	83.72 MB
2.Logic Functions/10.counting the number of functions and neutral functions.mkv	41.28 MB
2.Logic Functions/11.Venn diagram representation.mkv	60.21 MB
2.Logic Functions/12.Contact representation.mkv	62.09 MB
2.Logic Functions/13.Nested function.mkv	24.92 MB
2.Logic Functions/14.NAND gate and properties.mkv	25.62 MB
2.Logic Functions/15.NOR gate and properties.mkv	21.78 MB
2.Logic Functions/16.EX OR gate and properties.mkv	47.15 MB
2.Logic Functions/17.EX NOR gate and properties.mkv	54.10 MB
2.Logic Functions/18.Properties of EX-OR and EX-NOR.m4v	120.86 MB
2.Logic Functions/19.Minimum number of gates required for EX-OR and EX-NOR.m4v	28.75 MB
2.Logic Functions/2.Switching expressions and simplifications.mkv	86.12 MB
2.Logic Functions/20.Functionally completeness.mkv	58.97 MB
2.Logic Functions/21.Example 1 on functional completeness.mkv	18.05 MB
2.Logic Functions/22.Example 2 on functional completeness.mkv	18.23 MB
2.Logic Functions/23.Example 3 on functional completeness.mkv	14.07 MB
2.Logic Functions/24.Example 4 on functional completeness.mkv	7.16 MB
2.Logic Functions/25.Example 5 on functional completeness.mkv	33.61 MB
2.Logic Functions/26.Example 6 on functional completeness.mkv	55.47 MB
2.Logic Functions/27.Self dual functions.mkv	30.06 MB
2.Logic Functions/28.Number of self dual functions.mkv	41.28 MB
2.Logic Functions/29.Self dual functions are closed under complementation.mkv	25.50 MB
2.Logic Functions/3.Demorgans law and simplification..mkv	45.90 MB
2.Logic Functions/30.introduction to electronic gates.mkv	45.32 MB
2.Logic Functions/31.Positive and negative logic systems.mkv	51.77 MB
2.Logic Functions/32.Gate 2016 question on boolean algebra.mp4	29.90 MB
2.Logic Functions/33.Gate 2016 question on gray code function.mp4	44.55 MB
2.Logic Functions/4.Switching Functions..mkv	46.56 MB
2.Logic Functions/5.Canonical Sum of Products.mkv	74.14 MB
2.Logic Functions/6.Canonical Product of sums.mkv	64.13 MB
2.Logic Functions/7.Examples of canonical forms.mkv	45.42 MB
2.Logic Functions/8.Functional properties.mkv	20.44 MB
2.Logic Functions/9.Number of functions.mkv	58.03 MB
3.Minimization/1.Introduction to minimization of Boolean expressions.mkv	39.70 MB
3.Minimization/10.Minimal SOP Example.m4v	60.78 MB
3.Minimization/11.Minimal POS.mp4	100.13 MB
3.Minimization/12.Examples on Minimal POS.mp4	42.83 MB
3.Minimization/13.Introduction to Dont cares.mp4	128.52 MB
3.Minimization/14.Examples on dont care set 1.mp4	36.99 MB
3.Minimization/15.Examples on dont care set 2.1.mp4	36.17 MB
3.Minimization/16.Examples on dont care set 2.2.mp4	20.29 MB
3.Minimization/17.Examples on dont care set 2.3.mp4	47.78 MB
3.Minimization/18.Examples on dont care set 2.4.mp4	25.94 MB
3.Minimization/19.Examples on dont care set 2.5.mp4	18.34 MB
3.Minimization/2.Irredundant or irreducible expressions.mkv	57.90 MB
3.Minimization/20.Examples on dont care set 3.mp4	74.82 MB
3.Minimization/21.Finding Minimal Expressions.mp4	61.26 MB
3.Minimization/22.Branching Technique for Minimising Cyclic Functions.mp4	80.80 MB
3.Minimization/23.Implicant and Prime Implicant Difference.mp4	42.05 MB
3.Minimization/24.Converting a Function into Self Dual.mp4	58.24 MB
3.Minimization/25.Combining Functions having Dont Cares.mp4	70.23 MB
3.Minimization/26.Prime Implicants and Dont Cares.mp4	34.57 MB
3.Minimization/27.Number of Minimal Expressions.mp4	13.68 MB
3.Minimization/28.Beautiful Question on Prime Implicant Chart.mp4	57.59 MB
3.Minimization/29.Variable Entrant Maps(VEM).mp4	39.40 MB
3.Minimization/3.K map introduction.mkv	112.31 MB
3.Minimization/30.Minimisation using VEM.mp4	76.35 MB
3.Minimization/31.Example on VEM.mp4	52.79 MB
3.Minimization/32.finding the free variables.mp4	25.81 MB
3.Minimization/33.Relationship between Minimal POS SOP in case of dont cares - 1.mp4	86.98 MB
3.Minimization/34.Relationship between Minimal POS SOP in case of dont cares - 2.mp4	64.53 MB
3.Minimization/35.Comparing independent variables in minimal SOP and POS.mp4 Lecture Title.mp4	36.03 MB
3.Minimization/36.Number of irredundant and minimal expressions.mp4	138.00 MB
3.Minimization/37.dont cares are never included in the prime Implicant chart.mp4	75.18 MB
3.Minimization/38.Functions nvolving Functions Example 1.mp4	80.67 MB
3.Minimization/39.Functions involving Functions example 2.m4v	33.11 MB
3.Minimization/4.K map simplification.mkv	138.38 MB
3.Minimization/40.Functions involving Functions Example 3.m4v	69.75 MB
3.Minimization/42.Examples on KMap.mkv	64.19 MB
3.Minimization/6.covering functions.mkv	60.49 MB
3.Minimization/7.Implicants and Prime Implicants.m4v	65.32 MB
3.Minimization/8.Essential Prime Implicants.m4v	114.12 MB
3.Minimization/9.Procedure for obtaining Minimal SOP.m4v	166.38 MB
4.Design and Synthesis of Combinational circuits/1.Introduction to Logic Design.m4v	74.06 MB
4.Design and Synthesis of Combinational circuits/10.Comparator.mp4	33.14 MB
4.Design and Synthesis of Combinational circuits/11.Introduction to MUX.mp4	91.58 MB
4.Design and Synthesis of Combinational circuits/12.Proving MUX is functionally complete.mp4	39.21 MB
4.Design and Synthesis of Combinational circuits/13.Implementing functions with MUX example 1.mp4	105.35 MB
4.Design and Synthesis of Combinational circuits/14.Implementing functions with MUX example 2.mp4	19.11 MB
4.Design and Synthesis of Combinational circuits/15.multiplexer with enable input.mp4	63.32 MB
4.Design and Synthesis of Combinational circuits/16.relationship between select lines and inputs of a mux.mp4	35.81 MB
4.Design and Synthesis of Combinational circuits/17.cascading multiplexers - ex 1.mp4	23.67 MB
4.Design and Synthesis of Combinational circuits/18.cascading multiplexers - ex 2.mp4	13.69 MB
4.Design and Synthesis of Combinational circuits/19.cascading multiplexers - ex 3.mp4	22.74 MB
4.Design and Synthesis of Combinational circuits/2.AND-OR OR-AND realization.m4v	104.69 MB
4.Design and Synthesis of Combinational circuits/20.Expansion of multiplexers.mp4	167.94 MB
4.Design and Synthesis of Combinational circuits/21.Assigning select lines while expanding the MUX.mp4	60.51 MB
4.Design and Synthesis of Combinational circuits/22.Introduction to Demultiplexer.mp4	142.12 MB
4.Design and Synthesis of Combinational circuits/23.introduction to decoder.mp4	94.39 MB
4.Design and Synthesis of Combinational circuits/24.implementing functions with decoder example 1.mp4	22.61 MB
4.Design and Synthesis of Combinational circuits/25.implementing functions with decoder example 2.mp4	64.10 MB
4.Design and Synthesis of Combinational circuits/26.decoder for function implementation - ex3.mp4	27.46 MB
4.Design and Synthesis of Combinational circuits/27.converting one code to other code using decoder.mp4	110.11 MB
4.Design and Synthesis of Combinational circuits/28.ROM implementation using decoder.mp4	82.32 MB
4.Design and Synthesis of Combinational circuits/29.Implementing Functions using only Decoder.mp4	50.55 MB
4.Design and Synthesis of Combinational circuits/3.Minimum No of NAND gates example.m4v	21.55 MB
4.Design and Synthesis of Combinational circuits/30.Implementing Functions using Decoder and Multiplexer Example 1.mp4	72.68 MB
4.Design and Synthesis of Combinational circuits/31.Implementing Functions using Decoder and Multiplexer Example 2.mp4	83.71 MB
4.Design and Synthesis of Combinational circuits/32.Decoder with Enable Input.mp4	77.49 MB
4.Design and Synthesis of Combinational circuits/33.Constructing 3x8 Decoder using 1x2 Decode.mp4	53.74 MB
4.Design and Synthesis of Combinational circuits/34.Constructing 4x2 Decoder using 1x2 Decoder.mp4	37.56 MB
4.Design and Synthesis of Combinational circuits/35.Constructing 6x64 Decoder using 3x8 Decoder.mp4	54.83 MB
4.Design and Synthesis of Combinational circuits/36.Expansion of Decoder in general.mp4	75.92 MB
4.Design and Synthesis of Combinational circuits/37.Constructing 7x128 Decoder using 3x8 Decoder.mp4	63.13 MB
4.Design and Synthesis of Combinational circuits/38.Expansion of Decoders in another way.mp4	80.64 MB
4.Design and Synthesis of Combinational circuits/39.Address Expansion of ROM.mp4	81.86 MB
4.Design and Synthesis of Combinational circuits/4.NOR - NOR example.m4v	35.49 MB
4.Design and Synthesis of Combinational circuits/40.Word Expansion of ROM.mp4	61.03 MB
4.Design and Synthesis of Combinational circuits/41.Finding the Address ranges of Devices.mp4	22.90 MB
4.Design and Synthesis of Combinational circuits/42.Example on Enabling a Device.mp4	44.55 MB
4.Design and Synthesis of Combinational circuits/43.Finding the address ranges of Memory Devices.mp4	117.08 MB
4.Design and Synthesis of Combinational circuits/44.Introduction to Encoders.mp4	98.77 MB
4.Design and Synthesis of Combinational circuits/45.Priority Encoders.mp4	47.71 MB
4.Design and Synthesis of Combinational circuits/46.Introduction to Hazards.mp4	47.93 MB
4.Design and Synthesis of Combinational circuits/47.Hazards and test vectors.mp4	45.52 MB
4.Design and Synthesis of Combinational circuits/48.Examples on Test Vectors.mp4	54.74 MB
4.Design and Synthesis of Combinational circuits/49.Half Adder.mp4	23.72 MB
4.Design and Synthesis of Combinational circuits/5.Minimum No of NOR gates Example.mp4	14.09 MB
4.Design and Synthesis of Combinational circuits/50.Full Adder.mp4	58.62 MB
4.Design and Synthesis of Combinational circuits/51.Ripple Carry Adder.mp4	54.92 MB
4.Design and Synthesis of Combinational circuits/52.Carry Lookahead Adder.mp4	91.30 MB
4.Design and Synthesis of Combinational circuits/53.Carry look ahead adder implementation.mp4	50.52 MB
4.Design and Synthesis of Combinational circuits/54.Hybrid adder.mp4	40.97 MB
4.Design and Synthesis of Combinational circuits/55.Serial adder.mp4	41.83 MB
4.Design and Synthesis of Combinational circuits/56.Binary adder-subtractor.mp4	54.36 MB
4.Design and Synthesis of Combinational circuits/57.BCD adder.mp4	66.84 MB
4.Design and Synthesis of Combinational circuits/58.Invalid combinations for BCD adder.mp4	25.63 MB
4.Design and Synthesis of Combinational circuits/59.2 bit comparator.mp4	92.99 MB
4.Design and Synthesis of Combinational circuits/6.Minimum Noof NOR gates Example.mp4	11.38 MB
4.Design and Synthesis of Combinational circuits/60.3 4 bit comparators.mp4	50.22 MB
4.Design and Synthesis of Combinational circuits/61.Analysing all the cases of comparators.mp4	39.30 MB
4.Design and Synthesis of Combinational circuits/62.Gate 2016 question on multiplexer.m4v	11.63 MB
4.Design and Synthesis of Combinational circuits/63.Time complexity of ripple carry adder.m4v	10.95 MB
4.Design and Synthesis of Combinational circuits/64.Time complexity carry look ahead adder.m4v	57.95 MB
4.Design and Synthesis of Combinational circuits/7.EX-OR and EX-NOR implementation with NOR and NAND gates.mp4	51.53 MB
4.Design and Synthesis of Combinational circuits/8.Half adder.mp4	21.98 MB
4.Design and Synthesis of Combinational circuits/9.Half subtracter.mp4	24.51 MB
5.Sequential Circuits/1.Introduction to sequential circuits.m4v	38.59 MB
5.Sequential Circuits/10.example on flipflop.mp4	76.22 MB
5.Sequential Circuits/11.example on flipflop 2.mp4	56.82 MB
5.Sequential Circuits/12.introduction to flipflop inter conversion.mp4	118.88 MB
5.Sequential Circuits/13.inter conversion of flipflops example.mp4	53.47 MB
5.Sequential Circuits/14.inter conversion of flipflops example 2.mp4	43.79 MB
5.Sequential Circuits/15.inter conversion of flipflops example 3.mp4	64.77 MB
5.Sequential Circuits/16.inter conversion of flipflops example 4.mp4	17.38 MB
5.Sequential Circuits/17.inter conversion of flipflops example 5.mp4	11.95 MB
5.Sequential Circuits/18.introduction to counters.mp4	40.81 MB
5.Sequential Circuits/19.asynchronous and synchronous counters.mp4	57.50 MB
5.Sequential Circuits/2.latch and flipflop.m4v	76.04 MB
5.Sequential Circuits/20.shift counters.mp4	55.21 MB
5.Sequential Circuits/21.mod 2 ring counters.mp4	33.84 MB
5.Sequential Circuits/22.mod 4 Johnson counter.mp4	27.11 MB
5.Sequential Circuits/23.mod 6 Johnson counter.mp4	34.13 MB
5.Sequential Circuits/24.MoD 3 ring counters.mp4	82.46 MB
5.Sequential Circuits/25.mod 4 gray counter using T FF.mp4	112.11 MB
5.Sequential Circuits/26.mod 4 gray counter using D FF.mp4	32.35 MB
5.Sequential Circuits/27.mod 4 gray counter using 1 D and 1 T flipflop.mp4	23.47 MB
5.Sequential Circuits/28.counter using two different FFs.mp4	99.74 MB
5.Sequential Circuits/29.Deriving the clock frequency.mp4	34.82 MB
5.Sequential Circuits/3.SR flipflop.m4v	219.69 MB
5.Sequential Circuits/30.self starting and free running.mp4	75.56 MB
5.Sequential Circuits/31.example on selfstarting and free running counters.mp4	32.61 MB
5.Sequential Circuits/32.counter using 3 different FFs.mp4	77.31 MB
5.Sequential Circuits/33.example on combinational circuits and FFs.mp4	48.63 MB
5.Sequential Circuits/34.introduction to asynchronous counters.mp4	22.91 MB
5.Sequential Circuits/35.Mod 8 up counter.mp4	153.36 MB
5.Sequential Circuits/36.Mod 4 up Counter.mp4	25.75 MB
5.Sequential Circuits/37.mod 4 down counter.mp4	12.40 MB
5.Sequential Circuits/38.Mod 8 random counter.mp4	40.24 MB
5.Sequential Circuits/39.model on analysis counting States and sequence generations.mp4	73.65 MB
5.Sequential Circuits/4.clocked flipflops.m4v	66.67 MB
5.Sequential Circuits/40.Applications of Flip flops.mp4	12.83 MB
5.Sequential Circuits/41.3 bit shift right register.mp4	51.79 MB
5.Sequential Circuits/42.Example 1 on shift right register.mp4	34.39 MB
5.Sequential Circuits/43.Example 2 on shift right register.mp4	23.44 MB
5.Sequential Circuits/44.Binary to gray convertor.mp4	34.13 MB
5.Sequential Circuits/45.Finding 2s complement.mp4	67.01 MB
5.Sequential Circuits/46.Gate 2001 on counting Sequence.mp4	30.62 MB
5.Sequential Circuits/47.Gate 2004 on SR-Latch.mp4	13.02 MB
5.Sequential Circuits/48.Gate 2014 on counter.mp4	11.79 MB
5.Sequential Circuits/49.Gate 2015 on sequence generation.mp4	40.16 MB
5.Sequential Circuits/5.positive level triggered.m4v	39.90 MB
5.Sequential Circuits/50.Gate 2015 on bit sequence.mp4	45.63 MB
5.Sequential Circuits/51.Gate 2015 on sequence genetaion.mp4	37.61 MB
5.Sequential Circuits/6.edge triggered.m4v	31.45 MB
5.Sequential Circuits/7.JK flipflop.mp4	94.28 MB
5.Sequential Circuits/8.T flipflop.mp4	36.39 MB
5.Sequential Circuits/9.D flipflop.mp4	59.45 MB
6.Number system/1.Introduction to Number system.mp4	63.42 MB
6.Number system/10.Example 7.mp4	48.42 MB
6.Number system/11.Example 8.mp4	68.52 MB
6.Number system/12.Complementary number system.mp4	140.66 MB
6.Number system/13.Why we use complements.mp4	76.69 MB
6.Number system/14.Subtraction in diminished radix complement.mp4	95.26 MB
6.Number system/15.Examples on diminished radix complement.mp4	135.56 MB
6.Number system/16.examples on subtraction in radix complement.mp4	145.65 MB
6.Number system/17.Summary of subtraction using complements in case of unsigned numbers.mp4	77.25 MB
6.Number system/18.signed number representation.mp4	33.44 MB
6.Number system/19.example on signed number representations.mp4	120.93 MB
6.Number system/2.Conversion to base 10.mp4	72.97 MB
6.Number system/20.Ranges of signed number representations.mp4	114.17 MB
6.Number system/21.Examples on Ranges.mp4	55.70 MB
6.Number system/22.Sign bit extension.mp4	95.21 MB
6.Number system/23.overflow.mp4	133.53 MB
6.Number system/24.classification of binary codes.mp4	56.05 MB
6.Number system/25.8421 Excess-3 3321 codes.mp4	116.59 MB
6.Number system/26.Examples on codes.mp4	44.18 MB
6.Number system/27.BCD addition.mp4	59.46 MB
6.Number system/28.Excess-3 addition.mp4	34.16 MB
6.Number system/29.Gray code.mp4	76.45 MB
6.Number system/3.Conversion from base 10.mp4	110.54 MB
6.Number system/30.Binary to gray and vice versa.mp4	70.40 MB
6.Number system/31.Error detection.mp4	68.97 MB
6.Number system/32.Error correction.mp4	119.35 MB
6.Number system/33.Hamming code.mp4	114.87 MB
6.Number system/34.Examples on Hamming code.mp4	73.51 MB
6.Number system/35.Floating point Conversion.mp4	55.26 MB
6.Number system/36.Floating point representation.mp4	103.24 MB
6.Number system/37.Floating point representation.mp4	44.87 MB
6.Number system/38.Floating point representation Example 1.mp4	70.39 MB
6.Number system/39.40 Example 2.mp4	46.86 MB
6.Number system/4.Minimum number of bits required for inter conversion - ex 1.mp4	108.49 MB
6.Number system/40.Example 3.mp4	14.12 MB
6.Number system/41.Introduction to Floating point representation.mp4	18.54 MB
6.Number system/42.Introduction to IEEE Standards.mp4	17.89 MB
6.Number system/43.Single Precision.mp4	31.09 MB
6.Number system/44.Double precision.mp4	15.48 MB
6.Number system/45.Example 1 on single precision.mp4	16.69 MB
6.Number system/46.Example 2 on Single Precision.mp4	9.68 MB
6.Number system/47.Example 1 on double Precision.mp4	16.61 MB
6.Number system/48.Example 2 on Double Precision.mp4	5.70 MB
6.Number system/49.Example on single and double Precision.mp4	25.29 MB
6.Number system/5.Minimum number of bits required for inter conversion - ex 2.mp4	53.45 MB
6.Number system/50.Gate 2016 on number of integers.mp4	14.71 MB
6.Number system/51.Binary multiplication(partial sum method).mp4	36.93 MB
6.Number system/52.Idea behind Booths algorithm.mp4	20.47 MB
6.Number system/53.Booths algorithm example.mp4	23.40 MB
6.Number system/54.Booths algorithm.mp4	67.09 MB
6.Number system/55.Booth algorithm operations flow.mp4	17.44 MB
6.Number system/56.Advanteges and Dis- Advantages of Booths algorithm.mp4	19.83 MB
6.Number system/57.Example on fractional form.mp4	27.94 MB
6.Number system/58.Example on fractional and implicit forms.mp4	25.74 MB
6.Number system/6.Example 3.mp4	38.59 MB
6.Number system/7.Example 4.mp4	33.90 MB
6.Number system/8.Example 5.mp4	14.45 MB
6.Number system/9.Example 6.mp4	17.52 MB
7.Practice Questions/1.Practice Questions and Solutions Set-1.pdf	211.18 kB
7.Practice Questions/2.Practice Questions and Solutions Set-2.pdf	458.71 kB
7.Practice Questions/3.Practice Questions set-3.pdf	434.24 kB
7.Practice Questions/4.Practice Questions set-3 Solutions.pdf	580.18 kB
7.Practice Questions/5.Practice Questions and Solutions Set-4.pdf	282.82 kB
7.Practice Questions/7.Practice Questions and Solutions Set-5.pdf	135.99 kB
7.Practice Questions/8.Practice Questions and Solutions Set-6.pdf	470.45 kB
telegram @coursesghargate.url	128.00 B
Uploaded by [Coursesghar.com].txt	1.10 kB
Visit coursesghar.com for more awesome tutorials.url	114.00 B
[TGx]Downloaded from torrentgalaxy.to .txt	564.00 B

Description

RavindraBabu Ravula - GATE - 2021 - Digital Logic Design - CoursesGha

Section 2: Digital Logic
Boolean algebra. Combinational and sequential circuits. Minimization. Number representations and computer
arithmetic (fixed and floating point).