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The objective of this book is to provide a systematic and comprehensive insight into current sensing techniques. Both theoretical and practical aspects are covered. Design guidelines are derived by systematic analysis of different circuit principles. Innovative concepts like compensation of the bitline
multiplexer and auto-power-down will be explained based on theory and experimental results. The material will be interesting for design engineers in industry as well as researchers who want to learn about and apply current sensing techniques. The focus is on embedded SRAM but the material presented can be adapted to single-chip SRAM and to any other current-providing memory type as well. This includes emerging memory technologies like magnetic RAM (MRAM) and Ovonic Unified Memory (OUM). Moreover, it is also applicable to arraylike structures such as CMOS camera chips and to circuits for signal transmission along highly capacitive busses. The fundamental SRAM structure and sensing schemes are presented in Chap. 2. General properties of voltage and current sensing are discussed. The performance in terms of speed including a transmission line model of the bitline
is investigated. Even though the general emphasis is on current sensing, in Chap. 3 voltage sense amplifiers are considered since they will remain as a comparator block in current sense amplifiers. As a main consideration, Chap. 4 presents circuit principles for current sensing. A classification distinguishes four different types of current sensing, each in a single-ended version and in a fully-differential implementation introduced in this book. All types are characterized and compared in terms of power, delay and area, but also with respect to stability, robustness and operation at low supply voltages. The comparison also incorporates voltage sensing and gives future trends. A main limitation of the practical use of current sense amplifiers has been the finite resistance of the bitline multiplexer. Chapter 5 analyzes its influence and presents a method to overcome this effect by means of a current sense amplifier with improved feedback structure. The proposed solution is the first current sense amplifier which fully compensates for the influence of the bitline multiplexer in terms of delay and signal amplitude. The memory cell, in particular the cell stability, is considered in Chap. 6. This applies to voltage as well as current sensing. An analytical model is derived which determines a minimum bitline dc potential that guarantees stable read operation. The theory is confirmed by measurements and used to derive a trend for future technologies. Chapter 7 covers implementation aspects of current sense amplifiers and gives a design example. Circuits for power-down and precharge are presented. Measurements prove that the design example operates at a supply voltage as low as 0.7V. The appendix provides additional theoretical investigations and experimental data. A brief summary at the end of each chapter provides a quick reference for those readers who want to get an overview without going through all the details